ReP USP - Resultado da busca

Artigo de periodico
An enzymatic glucose biosensor using the BESOI MOSFET (2024)
Yojo, Leonardo Shimizu; Rangel, R C; Duarte, Pedro Henrique; Sasaki, Kátia Regina Akemi; Martino, João Antonio
Source: Solid State Electronics. Unidade: EP
Subjects: GLICOSE, DRENAGEM, TRANSISTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
YOJO, Leonardo Shimizu et al. An enzymatic glucose biosensor using the BESOI MOSFET. Solid State Electronics, v. 211, n. Ja 2024, p. 1-6, 2024Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108830. Acesso em: 09 maio 2024.
APA
Yojo, L. S., Rangel, R. C., Duarte, P. H., Sasaki, K. R. A., & Martino, J. A. (2024). An enzymatic glucose biosensor using the BESOI MOSFET. Solid State Electronics, 211( Ja 2024), 1-6. doi:10.1016/j.sse.2023.108830
NLM
Yojo LS, Rangel RC, Duarte PH, Sasaki KRA, Martino JA. An enzymatic glucose biosensor using the BESOI MOSFET [Internet]. Solid State Electronics. 2024 ;211( Ja 2024): 1-6.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108830
Vancouver
Yojo LS, Rangel RC, Duarte PH, Sasaki KRA, Martino JA. An enzymatic glucose biosensor using the BESOI MOSFET [Internet]. Solid State Electronics. 2024 ;211( Ja 2024): 1-6.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108830
Artigo de periodico
Experimental study of MISHEMT from 450 K down to 200 K for analog applications (2023)
Perina, Welder Fernandes; Martino, João Antonio ; Simoen, Eddy ; Peralagu, Uthayasankaran; Collaert, Nadine ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, SEMICONDUTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
PERINA, Welder Fernandes et al. Experimental study of MISHEMT from 450 K down to 200 K for analog applications. Solid State Electronics, v. 208, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108742. Acesso em: 09 maio 2024.
APA
Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). Experimental study of MISHEMT from 450 K down to 200 K for analog applications. Solid State Electronics, 208, 1-4. doi:10.1016/j.sse.2023.108742
NLM
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450 K down to 200 K for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Vancouver
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450 K down to 200 K for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Artigo de periodico
Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications (2023)
Silva, V C P; Martino, João Antonio ; Simoen, Eddy ; Veloso, Anabela; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, TEMPERATURA, NANOTECNOLOGIA, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, V C P et al. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications. Solid State Electronics, v. 208, p. 1-5, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108729. Acesso em: 09 maio 2024.
APA
Silva, V. C. P., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2023). Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications. Solid State Electronics, 208, 1-5. doi:10.1016/j.sse.2023.108729
NLM
Silva VCP, Martino JA, Simoen E, Veloso A, Agopian PGD. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications [Internet]. Solid State Electronics. 2023 ;208 1-5.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108729
Vancouver
Silva VCP, Martino JA, Simoen E, Veloso A, Agopian PGD. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications [Internet]. Solid State Electronics. 2023 ;208 1-5.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108729
Artigo de periodico
Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis (2023)
Silva, Wenita de Lima; Toledo, Rodrigo do Nascimento; Gonçalez Filho, Walter; Nogueira, Alexandro de Moraes; Agopian, Paula Ghedini Der ; Martino, João Antonio
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, NANOTECNOLOGIA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Wenita de Lima et al. Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis. Solid State Electronics, v. 202, p. 1-8, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108611. Acesso em: 09 maio 2024.
APA
Silva, W. de L., Toledo, R. do N., Gonçalez Filho, W., Nogueira, A. de M., Agopian, P. G. D., & Martino, J. A. (2023). Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis. Solid State Electronics, 202, 1-8. doi:10.1016/j.sse.2023.108611
NLM
Silva W de L, Toledo R do N, Gonçalez Filho W, Nogueira A de M, Agopian PGD, Martino JA. Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis [Internet]. Solid State Electronics. 2023 ; 202 1-8.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108611
Vancouver
Silva W de L, Toledo R do N, Gonçalez Filho W, Nogueira A de M, Agopian PGD, Martino JA. Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis [Internet]. Solid State Electronics. 2023 ; 202 1-8.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108611
Artigo de periodico
Experimental study of MISHEMT from 450k down to 200 k for analog applications (2023)
Perina, Welder Fernandes; Martino, João Antonio ; Simoen, Eddy ; Peralagu, Uthayasankaran; Collaert, Nadine ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, TEMPERATURA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
PERINA, Welder Fernandes et al. Experimental study of MISHEMT from 450k down to 200 k for analog applications. Solid State Electronics, v. 208, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108742. Acesso em: 09 maio 2024.
APA
Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). Experimental study of MISHEMT from 450k down to 200 k for analog applications. Solid State Electronics, 208, 1-4. doi:10.1016/j.sse.2023.108742
NLM
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450k down to 200 k for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Vancouver
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450k down to 200 k for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Artigo de periodico
Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data (2022)
Toledo, Rodrigo do Nascimento; Silva, Wenita de Lima; Gonçalez Filho, Walter; Nogueira, Alexandro de Moraes; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CONDUTIVIDADE ELÉTRICA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
TOLEDO, Rodrigo do Nascimento et al. Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data. Solid State Electronics, v. 194, p. 1-4, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108328. Acesso em: 09 maio 2024.
APA
Toledo, R. do N., Silva, W. de L., Gonçalez Filho, W., Nogueira, A. de M., Martino, J. A., & Agopian, P. G. D. (2022). Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data. Solid State Electronics, 194, 1-4. doi:10.1016/j.sse.2022.108328
NLM
Toledo R do N, Silva W de L, Gonçalez Filho W, Nogueira A de M, Martino JA, Agopian PGD. Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108328
Vancouver
Toledo R do N, Silva W de L, Gonçalez Filho W, Nogueira A de M, Martino JA, Agopian PGD. Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108328
Artigo de periodico
Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C (2022)
Sousa, Julia Cristina Soares; Perina, Welder F; Rangel, Roberto; Simoen, Eddy ; Veloso, Anabela; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: NANOTECNOLOGIA, CIRCUITOS ANALÓGICOS, TRANSISTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SOUSA, Julia Cristina Soares et al. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C. Solid State Electronics, v. 189, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108238. Acesso em: 09 maio 2024.
APA
Sousa, J. C. S., Perina, W. F., Rangel, R., Simoen, E., Veloso, A., Martino, J. A., & Agopian, P. G. D. (2022). Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C. Solid State Electronics, 189, 1-9. doi:10.1016/j.sse.2022.108238
NLM
Sousa JCS, Perina WF, Rangel R, Simoen E, Veloso A, Martino JA, Agopian PGD. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C [Internet]. Solid State Electronics. 2022 ;189 1-9.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108238
Vancouver
Sousa JCS, Perina WF, Rangel R, Simoen E, Veloso A, Martino JA, Agopian PGD. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C [Internet]. Solid State Electronics. 2022 ;189 1-9.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108238
Artigo de periodico
Signal to noise ratio in nanoscale bioFETs (2022)
Mori, Carlos Augusto Bergfeld; Martens, Koen; Simoen, Eddy ; Van Dorpe, Pol; Agopian, Paula Ghedini Der ; Martino, João Antonio
Source: Solid State Electronics. Unidade: EP
Subjects: NANOELETRÔNICA, DNA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
MORI, Carlos Augusto Bergfeld et al. Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, v. 194, p. 1-4, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108358. Acesso em: 09 maio 2024.
APA
Mori, C. A. B., Martens, K., Simoen, E., Van Dorpe, P., Agopian, P. G. D., & Martino, J. A. (2022). Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, 194, 1-4. doi:10.1016/j.sse.2022.108358
NLM
Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108358
Vancouver
Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108358
Artigo de periodico
Trade-off analysis between gm/ID and fT of nanosheet NMOS transistors with different metal gate stack at high temperature (2022)
Silva, Vanessa Cristina Pereira da; Martino, João Antonio ; Simoen, Eddy ; Veloso, Anabela; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, ALTA TEMPERATURA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Vanessa Cristina Pereira da et al. Trade-off analysis between gm/ID and fT of nanosheet NMOS transistors with different metal gate stack at high temperature. Solid State Electronics, v. 191, p. 1-8, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108267. Acesso em: 09 maio 2024.
APA
Silva, V. C. P. da, Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2022). Trade-off analysis between gm/ID and fT of nanosheet NMOS transistors with different metal gate stack at high temperature. Solid State Electronics, 191, 1-8. doi:10.1016/j.sse.2022.108267
NLM
Silva VCP da, Martino JA, Simoen E, Veloso A, Agopian PGD. Trade-off analysis between gm/ID and fT of nanosheet NMOS transistors with different metal gate stack at high temperature [Internet]. Solid State Electronics. 2022 ;191 1-8.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108267
Vancouver
Silva VCP da, Martino JA, Simoen E, Veloso A, Agopian PGD. Trade-off analysis between gm/ID and fT of nanosheet NMOS transistors with different metal gate stack at high temperature [Internet]. Solid State Electronics. 2022 ;191 1-8.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/j.sse.2022.108267
Artigo de periodico
Precise method to determine the stress current to be applied to electromigration test structures (1996)
Torres, L C M; Verdonck, Patrick Bernard
Source: Solid State Electronics. Unidade: EP
Assunto: SEMICONDUTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
TORRES, L C M e VERDONCK, Patrick Bernard. Precise method to determine the stress current to be applied to electromigration test structures. Solid State Electronics, v. 39, n. 12, p. 1805-7, 1996Tradução . . Disponível em: https://doi.org/10.1016/s0038-1101(96)00077-9. Acesso em: 09 maio 2024.
APA
Torres, L. C. M., & Verdonck, P. B. (1996). Precise method to determine the stress current to be applied to electromigration test structures. Solid State Electronics, 39( 12), 1805-7. doi:10.1016/s0038-1101(96)00077-9
NLM
Torres LCM, Verdonck PB. Precise method to determine the stress current to be applied to electromigration test structures [Internet]. Solid State Electronics. 1996 ;39( 12): 1805-7.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/s0038-1101(96)00077-9
Vancouver
Torres LCM, Verdonck PB. Precise method to determine the stress current to be applied to electromigration test structures [Internet]. Solid State Electronics. 1996 ;39( 12): 1805-7.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/s0038-1101(96)00077-9
Artigo de periodico
Oscillation of the scattering time in a 2d electron system with oval antidots (1996)
Gusev, G M; Kleber, X; Gennser, U; Maude, D K; Portal, J C; Lubyshev, D I; Basmaji, Pierre; Silva, M P A; Rossi, J C; Nastaushev, Y V; Baklanov, M R
Source: Solid State Electronics. Unidade: IFSC
Subjects: MATÉRIA CONDENSADA, SEMICONDUTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
GUSEV, G M et al. Oscillation of the scattering time in a 2d electron system with oval antidots. Solid State Electronics, v. 40, n. 1-8, p. 441-6, 1996Tradução . . Disponível em: https://doi.org/10.1016/0038-1101(95)00307-x. Acesso em: 09 maio 2024.
APA
Gusev, G. M., Kleber, X., Gennser, U., Maude, D. K., Portal, J. C., Lubyshev, D. I., et al. (1996). Oscillation of the scattering time in a 2d electron system with oval antidots. Solid State Electronics, 40( 1-8), 441-6. doi:10.1016/0038-1101(95)00307-x
NLM
Gusev GM, Kleber X, Gennser U, Maude DK, Portal JC, Lubyshev DI, Basmaji P, Silva MPA, Rossi JC, Nastaushev YV, Baklanov MR. Oscillation of the scattering time in a 2d electron system with oval antidots [Internet]. Solid State Electronics. 1996 ;40( 1-8): 441-6.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/0038-1101(95)00307-x
Vancouver
Gusev GM, Kleber X, Gennser U, Maude DK, Portal JC, Lubyshev DI, Basmaji P, Silva MPA, Rossi JC, Nastaushev YV, Baklanov MR. Oscillation of the scattering time in a 2d electron system with oval antidots [Internet]. Solid State Electronics. 1996 ;40( 1-8): 441-6.[citado 2024 maio 09 ] Available from: https://doi.org/10.1016/0038-1101(95)00307-x
Artigo de periodico
Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets (1993)
Martino, João Antonio ; Simoen, Eddy ; Magnusson, Ulf; Rotondaro, Antônio Luís Pacheco; Claeys, Cor
Source: Solid State Electronics. Unidade: EP
Assunto: SEMICONDUTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
MARTINO, João Antonio et al. Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets. Solid State Electronics, v. 36, n. ju 1993, p. 827-32, 1993Tradução . . Acesso em: 09 maio 2024.
APA
Martino, J. A., Simoen, E., Magnusson, U., Rotondaro, A. L. P., & Claeys, C. (1993). Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets. Solid State Electronics, 36( ju 1993), 827-32.
NLM
Martino JA, Simoen E, Magnusson U, Rotondaro ALP, Claeys C. Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets. Solid State Electronics. 1993 ;36( ju 1993): 827-32.[citado 2024 maio 09 ]
Vancouver
Martino JA, Simoen E, Magnusson U, Rotondaro ALP, Claeys C. Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets. Solid State Electronics. 1993 ;36( ju 1993): 827-32.[citado 2024 maio 09 ]

USP Schools

ReP

Filtros

Authors

USP affiliated authors

Subjects

Non normalized affiliation